cystech electronics corp. spec. no. : c 885n3 issued date : 20 14 .0 8 . 14 revised date : page no. : 1 / 9 mtde5p10n3 cyste k product specific ation p - channel enhancement mode mosfet mtde5p1 0n3 features ? advanced trench process technology ? high density cell design for ultra low on resistance ? low gate charge ? compact and low profile sot - 23 package ? pb - free & halogen - free package equivalent circuit outline ordering information device package shipping mtde5p10n3 - 0 - t1 - g sot - 23 ( pb - free lead plating and halogen - free package ) 3000 pcs / tape & reel mtde5 p 1 0n3 sot - 23 g gate s sour c e d drain d g s bv dss - 100v i d - 1.1a r ds(on) @v gs = - 10v, i d = - 1a 450m (typ) r ds(on) @v gs = - 6v, i d = - 1a 472m (typ) environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t1 : 3000 pcs / tape & reel, 7 reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c 885n3 issued date : 20 14 .0 8 . 14 revised date : page no. : 2 / 9 mtde5p10n3 cyste k product specific ation absolute maximum ratings (ta=25 ? c) parameter symbol limits unit drain - sour c e voltage v ds - 10 0 v gate - source voltage v gs 20 continuous drain current @t a =25 ? c (note 1) i d - 1.1 a continuous drain current @t a =70 ? c (not e 1) i d - 0.9 pulsed drain current (note 2) i dm - 8 maximum power dissipation p d 1. 38 w linear derating factor 0. 01 w/ ? c operating junction and storage temperature tj , tstg - 55~+150 ? c note : 1. surface mo unted on 1 in 2 copper pad of fr - 4 board, 270 ? c /w when mounted on minimum copper pad. 2. pulse width limited by maximum junction temperature. thermal performance parameter symbol limit unit thermal resistance, junction - to - ambient (note) rth,ja 9 0 ? c /w thermal resistance, junction - to - case rth,j c 7 5 note : surface mounted on 1 in 2 copper pad of fr - 4 board, 270 ? c /w when mounted on minimum copper pad. electrical characteristics (t j =25 ? symbol min. typ. max. unit te st conditions static bv dss - 10 0 - - v v gs =0v, i d = - 25 0 a v gs(th) - 1.0 - - 3.0 v ds =v gs , i d = - 25 0 a i gss - - 10 0 n a v gs = 20 v , v ds =0v i dss - - - 1 a v ds = - 80v, v gs =0v - - - 25 v ds = - 80v, v gs =0v, tj=55 ? c * r ds(on) - 450 70 0 m ? i d = - 1 a , v gs = - 10v - 472 750 i d = - 1 a , v gs = - 6v * g fs - 1.9 - s v ds = - 1 5v , i d = - 1a dynamic ciss - 479 - pf v ds = - 30v, v gs =0, f=1mhz coss - 16 - crss - 12 - * t d(on) - 5 - ns v d s = - 50 v, v g s = - 10 v , i d = - 1a, r g =6 * t r - 8 - * t d(off) - 18 - * t f - 4 -
cystech electronics corp. spec. no. : c 885n3 issued date : 20 14 .0 8 . 14 revised date : page no. : 3 / 9 mtde5p10n3 cyste k product specific ation * qg - 7.7 - nc v ds = - 80 v, i d = - 1 a, v gs = - 10 v * qgs - 1.6 - * qgd - 1.9 - source - drain diode * i s - - - 1.1 a * v sd - - 0. 81 - 1. 2 v v gs =0v, i sd = - 1. 0 a *trr - 35 - ns i f = - 1a, di f /dt=100a/ s *qrr - 50 - nc *pulse test : pulse width ? 300s, duty cycle ? 2% recommended soldering footprint
cystech electronics corp. spec. no. : c 885n3 issued date : 20 14 .0 8 . 14 revised date : page no. : 4 / 9 mtde5p10n3 cyste k product specific ation typical characteristics typical output characteristics 0 2 4 6 8 0 2 4 6 8 10 -v ds , drain-source voltage(v) -i d , drain current(a) -v gs =3v 4v 10v 9v 8v 7v 6v 5v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 100 1000 10000 0.001 0.01 0.1 1 10 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =-3v v gs =-4.5v -6v -10v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 1.4 0 2 4 6 8 10 -i dr , reverse drain current(a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 300 400 500 600 700 800 900 1000 0 2 4 6 8 10 -v gs , gate-source voltage(v) r ds(on) , static drain-source on- state resistance(m) i d =-1a drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 2.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) r ds(on) , normalized static drain- source on-state resistance v gs =-10v, i d =-1a r ds(on) @tj=25c : 450m
cystech electronics corp. spec. no. : c 885n3 issued date : 20 14 .0 8 . 14 revised date : page no. : 5 / 9 mtde5p10n3 cyste k product specific ation typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -v gs(t h) , normalized threshold voltage i d =-250 a maximum safe operating area 0.01 0.1 1 10 0.1 1 10 100 1000 -v ds , drain-source voltage(v) -i d , drain current(a) dc 100ms 100 s r ds(on) limit t a =25c, tj=150, v gs =-10v r ja =90c/w, single pulse 10ms 1ms maximum drain current vs junction temperature 0 0.2 0.4 0.6 0.8 1 1.2 1.4 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maxim um drain current(a) t a =25c, v gs =-10v single pulse power rating, junction to ambient (note on page 2) 0 20 40 60 80 100 0.0001 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c ja =90c/w gate charge characteristics 0 2 4 6 8 10 0 2 4 6 8 10 qg, total gate charge(nc) -v gs , gate-source voltage(v) v ds =-80v i d =-1a
cystech electronics corp. spec. no. : c 885n3 issued date : 20 14 .0 8 . 14 revised date : page no. : 6 / 9 mtde5p10n3 cyste k product specific ation typical characteristics (cont.) typical transfer characteristics 0 1 2 3 4 5 6 7 8 0 2 4 6 8 10 -v gs , gate-source voltage(v) -i d , drain current(a) v ds =-10v forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 -i d , drain current(a) g fs , forward transfer adm ittance(s) pulsed ta=25c v ds =-15v transient thermal response curves 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 t 1 , square wave pulse duration(s) r(t), normalized effective transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =90c/w
cystech electronics corp. spec. no. : c 885n3 issued date : 20 14 .0 8 . 14 revised date : page no. : 7 / 9 mtde5p10n3 cyste k product specific ation reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c 885n3 issued date : 20 14 .0 8 . 14 revised date : page no. : 8 / 9 mtde5p10n3 cyste k product specific ation recommended wave soldering condition product peak temperatur e soldering time pb - free devices 260 +0/ - 5 ? c 5 +1/ - 1 seconds recommended temperature profile for ir reflow profile feature sn - pb eutectic assembly pb - free assembly average ramp - up rate (tsmax to tp) 3 ? c /second max. 3 ? c /second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 ? c 150 ? c 60 - 120 seconds 150 ? c 200 ? c 60 - 180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 ? c 60 - 150 seconds 217 ? c 60 - 150 seconds peak temperature(t p ) 240 +0/ - 5 ? c 260 +0/ - 5 ? c time within 5 ? c of actual peak temperature(tp) 10 - 30 seconds 20 - 40 seconds ramp down rate 6 ? c /second max. 6 ? c /second max. time 25 ? c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of th e package, measured on the package body surface.
cystech electronics corp. spec. no. : c 885n3 issued date : 20 14 .0 8 . 14 revised date : page no. : 9 / 9 mtde5p10n3 cyste k product specific ation sot - 23 dimension *: typical dim inches millimeters dim inches millimeters min. max. min. max. min. max. min. max. a 0.1102 0.1204 2.80 3.04 j 0.003 2 0.007 9 0. 08 0. 20 b 0.0472 0.06 69 1.20 1. 7 0 k 0.01 1 8 0.0266 0.3 0 0.67 c 0.0335 0.0512 0.89 1.30 l 0.0335 0.0453 0.85 1.15 d 0.0118 0.0197 0.30 0.50 s 0.0830 0.1 161 2.10 2. 9 5 g 0.0669 0.0910 1.70 2.30 v 0.0098 0.0256 0.25 0.65 h 0.000 0 0.0040 0.0 0 0.10 l1 0.0118 0.0197 0.30 0.50 notes: 1. contro lling dimension: millimeters. 2 . maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please contact your local cyste k sales office. material: ? ? mold compound: epoxy resin family, flammability solid burning class: ul94v - 0 . important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the pr ior written approval of cyste k . ? cyste k reserves the right to make changes to its products without notice. ? cyste k semiconductor products are not warranted to be suitable for use in life - support applications, or systems. ? cyste k assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. style: pin 1.gate 2.source 3.drain marking: 3 - lead sot - 23 plastic surface mounted package cyste k package code: n3 e5p10 te
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